Self calibration of continuous-time filters and systems comprising such filters

ABSTRACT

Continuous-time filter system with self-calibration means. The system comprises a master control unit ( 36 ) and a slave unit with one or more slave filters ( 27.1 - 27 .n). The master control unit ( 36 ) comprises an integrator ( 30 ) having circuit elements ( 33 , C) which match those elements of the slave filter ( 27.1 - 27 .n) that define the slave filter&#39;s time constant (τ). Furthermore, the master control unit ( 36 ) comprises a voltage comparator ( 35 ) connected to an output ( 34 ) of the integrator ( 30 ), the voltage comparator ( 35 ) providing an output frequency signal (f com ), and a phase frequency comparator (PFC;  28 ) providing a control signal (υ) as output signal, the phase frequency comparator (PFC;  28 ) receiving said output frequency signal (f com ) and a reference frequency signal (f ref ) as input signals. The slave unit comprises said at least one slave filter ( 27.1 - 27 .n), the slave filter ( 27.1 - 27 .n) having a control signal input ( 41 ) for receiving said control signal (υ) thus allowing to calibrate the slave filter&#39;s transfer function by influencing the slave filter&#39;s time constant (τ).

The present invention concerns the calibration of continuous-timefilters, and in particular continuous-time Gm-C and RC-filters.

Continuous-time filters have found increasing commercial applications intelecommunications, video-signal processing, disk drivers, computercommunication networks and so forth. A continuous-time filter can befavourably

implemented with transconductors and capacitors. Such a filter is calledGm-C filter. If realized using passive resistors and capacitors, therespective filter is called RC-filter.

The frequency characteristics of a filter is determined by the productof the resistance R and the capacitance C in an RC-filter. In a Gm-Cfilter, the time constant is given by C/G_(m).

There is prior art concerning the calibration of the transconductance Gmalone. Such calibrations schemes are not applicable to continuous-timefilters, which represent a vast majority of circuits usingtransconductances. According to the prior art documents listed below,the calibration is achieved by matching the output current of thetransconductance—to the input of which a DC signal is applied—to areference current. A matching error is then used to tune thetransconductance:

-   -   U.S. Pat. No. 5,621,355    -   U.S. Pat. No. 5,650,950    -   U.S. Pat. No. 5,912,583    -   U.S. Pat. No. 6,140,867    -   U.S. Pat. No. 6,172,569    -   EP 561 099

All these prior art documents use the same principle of calibration,while there are certain differences among these documents that only liein the ways the reference current is being generated. There are alsosome minor differences in the implementation details. U.S. Pat. No.5,621,355, for example, requires a precision external resistor, whileothers documents require a precision current digital-analog converter(DAC). According to U.S. Pat. No. 5,621,355 the reference current isgenerated by applying an accurate DC voltage, while in U.S. Pat. Nos.5,650,950, 5,912,583, 6,140,867, and 6,172,569 the desiredtransconductance Gm is mapped to a reference current by a digital signalapplied to the DAC. EP 561 099 proposes to use a polarization circuit todo the calibration.

There are application limitations for these prior art schemes. Therequirement of an external precision resistor, a precision DAC, and aprecision DC voltage make these schemes expensive. Another disadvantageis that the calibration is done at DC.

The scheme presented in U.S. Pat. No. 5,621,355 is actually amodification of a previous publication by Laber and Gray in IEEE Journalof Solid-State Circuits, Vol. 28, No. 4, April 1993, where only Gm istuned. The modification was to replace the external resistor by aswitched-capacitor acting as a resistor. As above, the calibration is tomatch the transconductance Gm to that of an external precision resistorby forcing the same voltage over both the resistor and the input of thetransconductor Gm.

Yet another approach is disclosed in U.S. Pat. No. 6,304,135. Accordingto U.S. Pat. No. 6,304,135, Gm is determined by an external resistorR_(ext) and C is calibrated iteratively by compensating an on-chipcalibrating capacitor with a very complex variable current source. Aspecial algorithm is required to perform the iterative calibration. Thevariable current source proposed in U.S. Pat. No. 6,304,135 is complex.The calibration approach only works with the one transconductor typedescribed in U.S. Pat. No. 6,304,135 and the approach is not applicableto other types of transconductors.

The calibration scheme presented in U.S. Pat. No. 6,084,465 works in adifferent manner. After a discharge is completed, one capacitor ischarged by the master Gm within a certain time interval, the capacitorvoltage at the end of this time interval then being compared with afixed voltage. An error signal is then used to tune the Gm. In order topreserve this voltage while the capacitor is in discharge, anothercapacitor with switches is required. Both capacitors have to beperfectly matched which is not possible in practice thus resulting inerrors. It is another disadvantage of this scheme, that a very complexstate machine is required to control various switches. Furthermore, thewhole calibration takes quite long.

A variation of the scheme presented in U.S. Pat. No. 6,084,465 isdescribed in U.S. Pat. No. 6,111,467. This scheme is complex too, and itrequires many switches and switching activities.

A very complicated and complex scheme is described in U.S. Pat. No.6,112,125. The tuning is achieved by injecting a reference signal andmonitoring the phase of a filter output.

The big advantage of a Gm-C filter over an RC-filter is the tuningability of the filter via the transconductance G_(m). However, bothfilter types suffer from process variations, thus limiting them only tonon-critical applications.

Self calibration is an effective technique to surmount the problem andto realize more accurate continuous-time filters. Almost all knowncalibration techniques are based on the so-called master-slaveprinciple. Both the slave filter, which processes the signal, and themaster control block, which may be either comprise a voltage-controlledoscillator (VCO) or a voltage controlled filter (VCF), are made ofidentical transconductors controlled by a voltage. After the mastercontrol block, which is put within a phase-locked loop (PLL), iscalibrated or tuned to a reference frequency of the PLL, its timeconstant (τ) is tuned to the correct value. If the transconductors andcapacitors in both master and slave are perfectly matched, the slavefilter is also tuned to its desired characteristics. It is adisadvantage of conventional calibration techniques that a VCO or VCFrequires at least two integrators, i.e., at least two transconductorsand some capacitors. The tuning precision is relative poor because ofthe internal mismatches. In addition, the power consumption and therequired area are considerably large.

A basic lossless Gm-C integrator 10 is illustrated in FIG. 1. The Gm-Cintegrator 10 comprises a transconductor 13 having a voltage input 12.Another input 15 is connected to ground. A capacitor C is arrangedbetween the transconductor output 14 and ground. The integrator'stransfer function is given by

$\begin{matrix}{\frac{V_{0}}{V_{in}} = \frac{1}{s\;\tau}} & (1)\end{matrix}$

where τ is the time constant of the integrator 10, determined by thecapacitor C

and the transconductance G_(m) of the transconductor 13:

$\begin{matrix}{\tau = \frac{C}{G_{m}}} & (2)\end{matrix}$

In an RC filter, the time constant τ is the product of R and C. In anintegrated

Filter, both G_(m) or C are subject to process variations and so are thecharacteristics of the whole filter, too. It is an advantage of Gm-Cfilter, that G_(m) is controllable. G_(m) can be controlled by varyingthe voltage υ (herein also referred to as control signal) that isapplied to an input 11 of the transconductor 13. By an appropriatearrangement Gm-C filters can be made to be self calibrated.

Currently, continuous-time Gm-C filters or RC filters are confined onlyto non-critical applications due to process variations, if no specialmeasures are taken.

It is another object of the present invention to provide filter systemsthat avoid or reduce disadvantages of known filter systems.

It is an object of the present invention to provide a scheme forflexible calibration of continuous-time Gm-C filters and RC-filters.

SUMMARY

These and other objectives are achieved by the present invention whichprovides filter systems according to claim 1 and implementations,according to claim 15, using such filter systems.

Advantageous implementations are claimed in the dependent claims 2through 14.

This proposal discloses a technique that overcomes all of the abovementioned problems by using just one transconductor or resistor and onecapacitor in the master control unit. Other aspects of the inventionwill be apparent from and elucidated with reference to the embodiment(s)described hereinafter.

BRIEF DESCRIPTION OF THE DRAWINGS

For a more complete description of the present invention and for furtherobjects and advantages thereof, reference is made to the followingdescription, taken in conjunction with the accompanying drawings, inwhich:

-   -   FIG. 1 is a schematic block diagram of a conventional lossless        Gm-C integrator,    -   FIG. 2A is a schematic block diagram of a master control block,        according to the present invention,    -   FIG. 2B is a graph giving the definition of ξ,    -   FIG. 3 is a schematic block diagram of a filter system,        according to the present invention,    -   FIG. 4A is a schematic block diagram of a logic circuit,        according to the present invention,    -   FIG. 4B is a graph showing various signals, according to the        present invention,    -   FIG. 5 is a schematic block diagram of a phase frequency        comparator (PFC), according to the present invention,    -   FIG. 6 is a graph showing other signals, according to the        present invention,    -   FIG. 7 is a schematic block diagram of a VCC that can be used in        an RC filter, according to the present invention.

FIG. 2A illustrates the principle of the proposed self calibrationscheme. It is based on the master-slave principle. However, the masteris neither a VCO nor a VCF, as in prior art systems. Instead, itcomprises an integrator 20 similar to the integrator 10 shown in FIG. 1.According to the invention, a DC voltage V_(B) is applied to the input22 of a transconductor 23, which is followed by a comparator 25. Acapacitor C is arranged between the transconductor output 24 and ground.The voltage V_(C) over the capacitor C can be expressed as

$\begin{matrix}{V_{C} = {{\int{\frac{G_{m}V_{B}}{C}{\mathbb{d}t}}} = \frac{V_{B}t}{\tau}}} & (3)\end{matrix}$

Referring to the graph in FIG. 2B, if the initial value of the voltageV_(C) at the transconductor output 24 is zero, the time t that it takesfor V_(C) to reach the threshold level V_(th) of the comparator 25 isgiven byξ=τV _(th) /V _(B)   (4)

Rewriting the above equation yields the time constant of interestτ=ξV _(B) /V _(th)  (5)

Therefore, the time constant τ of a salve filter, defined in eq. (2),can be calibrated or tuned either by varying V_(th), or V_(B) , or ξ orany combination of theses parameters. Defined in FIG. 2B, the parameterξ is a time quantity and can be made very accurate in a way as presentedbelow.

Based on the principle shown in FIGS. 2A and 2B, the block diagram ofthe proposed self calibration scheme for Gm-C filters is presented inFIG. 3, where the capacitors in the slave filters 27.1-27.5 are notshown. In addition to the integrator 30, the capacitor C, thetransconductor 33, and the comparator 35, the master control block 36comprises a phase-frequency comparator (PFC) 28, and a switch 39,controlled by the signal V_(S). The switch 39 is arranged in parallel tothe capacitor C. The transconductors 33 both in the master control block36 and the slave filters 27.1-27.5 are controlled by the control signalu of the phase-frequency comparator 28. Both signals V_(S) and thereference frequency f_(ref) are derived from a clock signal CK, asschematically indicated in FIG. 3. A logic circuit 40 is employed toprovide the signals V_(S) and f_(ref). Details of an exemplary logiccircuit 40 are given in FIG. 4A. The logic circuit 40 receives a clocksignal CK as input signal. Such a clock signal is generally available onchip.

The operation of the logic circuit 40—as illustrated in FIG. 4A—is asfollows: The input clock CK is first delayed by two delay elements 51and 42, thus generating two delayed versions of the clock signal CK,designated as dl1, which is inverted, and dl2. The frequency of theinput clock, f_(CK), is divided by two by the flip-flop (FF1) 43, whichis assumed to be a positive edge-triggered flip-flop. This is why itsclock signal is first inverted by means of an inverter 44. The signaldl2 is applied as clock signal to a second preset flip-flop (FF2) 45. Aset signal (set) is generated by a logic combination of CK, dl1 and qn2. In the present example, the logic combination is performed by the twogates 46 and 47. The Q-output 48 of the flip-flop (FF2) 45 goes logichigh whenever the set signal (set) is logic low. Two gates 49 and 50 areemployed at the output side of the logic circuit 40 in order to providethe output signal V_(S) that is employed to control the switch 39. Theinterdependence of the signals is illustrated in the graphs of FIG. 4B.

Now back to FIG. 3. When the output signal V_(S) is logic high, theswitch 39 is closed and the capacitor C discharges. During this time,the reference frequency signal f_(ref) is logic low (see the diagrams inFIGS. 4B and 6). As soon as f_(ref) switches to logic high, V_(S) goesback to logic low. The switch 39 is opened again and the transconductor33 starts to charge the capacitor C. As long as V_(C) is below thethreshold voltage V_(th) of the comparator 35 (cf. FIG. 6), the outputsignal f_(com) at the output 29 of the comparator 35 remains logic high.The output signal f_(com) switches to logic low as soon as V_(C) exceedsthe threshold voltage V_(th) of the comparator 35. The PFC 28 (e.g.,comprising a PFD and a loop filter) generates the control signal υ andapplies it to the input 31 in such a way that the phase differencebetween f_(ref) and f_(com) becomes zero. In other words, the PFC 28compares the phases and the frequencies of the input signals f_(ref) andf_(com). One hasξ=T  (6)

where T is the period of the input clock CK (cf. FIG. 4B). Substitutingeq. (6) into eq. (5) yieldsτ=TV _(B) /V _(th)  (7)

In other words, according to the present invention a filter system withself-calibration means is provided, as illustrated in FIG. 3. The systemcomprises a master control unit 36 and a slave unit with one or moreslave filters 27.1-27.n. The master control unit 36 as such comprises anintegrator 30 having circuit elements which match those circuit elementsof the slave filter 27.1-27.n that define the slave filter's timeconstant τ. According to the present invention good matching isachieved, if the ratio of Gm of the master to Gm of a slave filter isconstant. The same should apply to the ratio of the capacitance of themaster to the capacitance of the slave filter. Furthermore, the mastercontrol unit 36 comprises a voltage comparator 35 being connected to anoutput 34 of the integrator 30. The voltage comparator 35 is employed toprovide an output frequency signal f_(com) at the output 29. There is aso-called phase frequency comparator (PFC) 28 that provides a controlsignal υ as output signal. The phase frequency comparator 28 receivesthe output frequency signal f_(com) and a reference frequency signalf_(ref) as input signals. The slave unit comprises at least one slavefilter 27.1-27.n. Each slave filter has a control signal input 41 forreceiving the control signal υ that allows to calibrate the slavefilter's transfer function by influencing the slave filter's timeconstant τ. In FIG. 3, an embodiment is shown where the transferfunctions of all five slave filters 27.1-27.n are calibrated by a commoncontrol signal υ.

According to the invention, the time constant τ is calibrated by tuningG_(m). This is done by periodically charging the capacitor C of themaster control block 36 within a certain time interval of the clocksignal CK. The comparator 35 is employed to compare the voltage V_(C)over this capacitor C with a predefined voltage V_(th), thus generatinga periodic signal f_(com). By using a PLL, the time constant τ to betuned can be made to be equal to the period T of the clock signal CK.This is very convenient in practice. The time constant τ of a largerange can be calibrated by adjusting the clock frequency f_(CK).

Details of a phase frequency comparator 28 are illustrated in FIG. 5.The PFC 28 may comprise a loop filter 52 having an output 31 andproviding the control signal υ as output signal at this output 31. Thephase frequency comparator 28 may further comprise a phase frequencydetector (PFD) 53 arranged in front of the loop filter 52. The phasefrequency detector 53 has two inputs. It receives the output frequencysignal f_(com) and a reference frequency signal f_(ref) as inputsignals. In the present embodiment, the PFD 53 is designed to operate onthe falling edges 54 and 55 of the output frequency signal f_(com) andthe reference frequency signal f_(ref), as indicated in the graph ofFIG. 6. An error signal x representing the phase difference between theoutput frequency signal f_(com) and the reference frequency signalf_(ref) is being fed by the phase frequency detector 53 to the loopfilter 52 in order to enable the loop filter 52 to provide the controlsignal υ as output signal. The graph of FIG. 6 gives further detailsabout the timing and the self calibration according to the presentinvention.

According to known calibration techniques, a VCO or VCF in the mastercontrol unit is tuned to the reference frequency of a PFD. By contrast,the time constant τ presented in connection with the present inventiondepends on three circuit parameters: the input DC voltage V_(B) at theinput 32, the threshold voltage V_(th) of the comparator 35, and theperiod T of the input clock signal CK, as expressed by eq. (7).According to the present invention, there is, therefore, a high degreeof freedom and flexibility in calibrating Gm-C filters: Varying one,two, or even all three circuit parameters V_(B) , V_(th), Tsimultaneously. This is one of the most salient features the inventivecalibration scheme possesses. Consider the case of varying just onecircuit parameter:

1) Tuning the G_(m) by the input clock frequency f_(CK) while keepingV_(th) and V_(B) unchanged. For this calibration strategy, the timeconstant τ is tuned by varying the clock frequency f_(CK), which is thereciprocal of the input clock period T. As a result, the time constant τis tuned to the product of the input clock period T and the V_(th) toV_(B) ratio, as given in eq. (7). Particularly, if V_(th)=V_(β), oneobtainsτ=T  (8)

Similarly, if V_(th)=2V_(B) , one has τ=T/2 and if V_(th)=V_(B) /2,τ=2T, etc.

From eq. (8) it is apparent that this calibration strategy offers thehighest calibration accuracy, which is the same as that of the inputclock, and this accuracy maintains over the entire tuning range. Alsoτ=T makes it very attractive in practice.

2) The time constant τ can be made proportional to V_(B) if V_(th) andf_(ref) are kept unchanged. In this case, the available tuning range maybe limited by the input range of the transconductor 33.

3) The time constant τ can be made inversely proportional to V_(th) ifV_(B) and f_(ref) are left unchanged. This calibration strategy makes itpossible to tune the time constant τ over a larger range by a smallervariation in V_(th). To demonstrate this, a numeric example isconsidered. Assuming the default value for V_(B) is 1V and thecorresponding transconductance is G_(m0), the following table isobtained:

Calibration strategy Tuning voltage V_(B) [V] 1 2 4 8 2) Calibrationstrategy Tuning voltage V_(th) [V] 1 0.5 0.25 .125 3) G_(m0) G_(m0)2G_(m0) 4G_(m0) 8G_(m0)

It is seen that in order to tune G_(m) by a factor of 8, thiscalibration strategy requires V_(th) to change only from 1 to0.125=0.725V. By contrast, the calibration strategy 2) entails a varyingrange of as large as 7V.

According to the present invention, it is also possible to allow two oreven all three circuit parameters to vary simultaneously to calibratethe Gm-C filter. This is particularly useful in applications where awider tuning range is required.

In the following, the calibration of RC filters is addressed. So far thepresent specification was mainly targeted at Gm-C filters. The proposedcalibration technique can be directly applied to RC filters, too. Theonly change is that one has to replace the transconductor in the mastercontrol block by a voltage-to-current converter (VCC). The purpose is tohave a transconductance derived from a resistor of the same type as usedin the slave RC filters.

One possible embodiment of such a converter is depicted in FIG. 7. Anoperational amplifier 61 (op-amp) drives two matched pMOS transistors 62and 63. Assuming an infinite amplifier gain, a feedback via a connection64 will force the voltage V₁ over a resistor R to be equal to V_(B) ,resulting in a transconductor of the value:G _(m)=1/R  (9)

Note that according to the present invention this VCC 60 is only neededin the master control block. FIG. 7 assumes that the resistors R in boththe master control block and the slave filters are controlled by thevoltage υ. In fact, the proposed calibration technique allows to varyeither R or C. This is accomplished by replacing resistors or capacitorsby so-called programmable resistor arrays (PRA) or programmablecapacitor arrays. A programmable resistor array is an array or tree ofresistors with a number of switches and a programmable capacitor arrayis an array or tree of capacitors with a number of switches.

While the time constant τ can be tuned/calibrated continuously with Gm-Cfilters,

the calibration of a RC filter is in steps. In binary programmableelement arrays, the steps are determined by the smallest segment in thearray.

The present invention is well suited for being used in a basebandintegrated circuit (IC) designed for GSM transceivers, for example. Insuch a GSM transceiver, in the transmitter path a 3rd order Butterworthlowpass (LPF) filter is required to suppress the image components of theGMSK modulated signal after a transmitter digital-to-analog converter(DAC) at 4.33 MHz. Being an RC-type filter and no calibration or tuningbeing provided, the filter would be very vulnerable to processvariations. As the resistance used can vary as large as −13% and +33%,and the capacitance +/−10%, it is quite difficult to achieve bothsufficient image rejection and maximum flatness up to 100 kHz in thepassband when using conventional approaches. If the time constant τ wastoo large, the 3 dB frequency would be shifted to a lower frequency,whereas this does not cause concern in the image rejection, it does forthe baseband signal. Similarly, there might be concerns with the imagerejection if the time constant τ was too small due to processvariations. Furthermore, if the process had shifted, or if a newapplication or system was foreseen, a complete redesign would beinevitable.

Such a redesign can be avoided if the self calibration according to thepresent invention is employed. Adding self calibration capability tocontinuous-time filters targeted at critical applications can greatlyreduce the time-to-market cycle, greatly reduce the costs, and greatlyenhance the system performances.

As an example to verify the calibration scheme according to the presentinvention, a 3rd-order Gm-C filter has been designed, using the proposedcalibration strategy 1). Simulation results indicate that thecalibration process, without any optimization, takes only less than 9cycles of the reference frequency f_(ref) to complete. The timeconstants τ, both in the master control block and the slave filters,become error-free after the calibration.

Filter systems according to the present invention are based on a selfcalibration technique using only one transconductor and one capacitor.The master control block is not a VCO or VCF.

The invention is very well suited for accurate, integratedcontinuous-time filters, such as continuous-time Gm-C filters (usingtransconductors and capacitors) or continuous-time RC filters (usingpassive resistor and capacitors).

The invention offers a high degree of freedom and flexibility inchoosing a calibration strategy. The circuits proposed are robust andthe calibration is efficient and can be done with high precision. It isa further advantage that no external elements are required. Theinventive scheme is very attractive for low-cost integration. There areno application limitations at all.

Filter system according to the present invention are based on the socalled master-slave principle.

It is appreciated that various features of the invention which are, forclarity, described in the context of separate embodiments may also beprovided in combination in a single embodiment. Conversely, variousfeatures of the invention which are, for brevity, described in thecontext of a single embodiment may also be provided separately or in anysuitable subcombination.

In the drawings and specification there has been set forth preferredembodiments of the invention and, although specific terms are used, thedescription thus given uses terminology in a generic and descriptivesense only and not for purposes of limitation.

1. A continuous-time filter system comprising: a master control unit anda slave unit with at least one slave filter, the master control unitincluding an integrator having a transconductor and a capacitor whichmatch those elements of the slave filter that define a time constant ofthe slave filter, a voltage comparator connected to a variable thresholdvoltage and to an output of the integrator, the voltage comparatorproviding an output frequency signal, and a phase frequency comparatorproviding a control signal as an output signal, the phase frequencycomparator receiving said output frequency signal and a referencefrequency signal provided by a logic circuit as input signals; and theslave unit including said at least one slave filter-that uses thecontrol signal to influence the slave filter's time constant and thereinfacilitate calibration of a transfer function of the slave filter. 2.The system of claim 1, wherein the slave filter is an RC-filter and thecontrol signal is a discrete signal leading to a calibration of theslave filter's transfer function in steps.
 3. The system of claim 1,wherein the slave filter is a continuous-time Gm-C-filter and thecontrol signal is a continuous signal.
 4. The system of claim 1, whereinthe slave filter is an integrated filter.
 5. The system of claim 1,wherein the master control unit comprises one transconductor and onecapacitor only.
 6. The system of one claim 1, wherein the phasefrequency comparator comprises: a loop filter providing the controlsignal as output signal, a phase frequency detector situated in front ofthe loop filter, the phase frequency detector receiving said outputfrequency signal and a reference frequency signal as input signals, andan error signal representing the phase difference between the outputfrequency signal and the reference frequency signal being fed by thephase frequency detector to the loop filter.
 7. The system of claim 1,wherein the master control unit comprises a switch being controllable bya signal.
 8. The system of claim 1, wherein a DC voltage is applied toan input of the integrator.
 9. The system of claim 1, wherein theintegrator has a transconductance that can be tuned by varying athreshold voltage being applied to an input of the voltage comparator,and/or a DC voltage being applied to an input of the integrator, and/orthe frequency of a clock signal.
 10. The system of claim 1, wherein theintegrator has a transconductance that can be tuned by varying a DCvoltage being applied to an input of the integrator while keeping athreshold voltage being applied to an input of the voltage comparatorand the reference frequency signal unchanged.
 11. The system of claim 1,wherein the integrator has a transconductance that can be tuned byvarying a threshold voltage being applied to an input of the voltagecomparator while keeping a DC voltage being applied to an input of theintegrator and the reference frequency signal unchanged.
 12. The systemof claim 1, wherein the transconductor comprises a voltage-to-currentconverter that includes a programmable resistor array or a programmablecapacitor array.
 13. The system of claim 1, further embodied in atelecommunication system, video-signal processing system, or disk driversystem.
 14. A continuous-time filter system comprising: a master controlunit a slave unit with a least one slave filter, the master control unitincluding an integrator having a transconductor and a capacitor thatmatch those elements of the slave filter that define a time constant ofthe slave filter, a voltage comparator connected to a variable thresholdvoltage and to an output of the integrator, the voltage comparatorproviding an output frequency signal, and a phase frequency comparatorproviding a control signal as an output signal, the phase frequencycomparator receiving said output frequency signal and a referencefrequency signal as input signals; and the slave unit including said atleast one slave filter that uses the control signal to influence theslave filter's time constant and therein facilitate calibration of atransfer function of the slave filter, wherein the master control unitincludes a switch being controllable by a signal (V_(s)), and wherein alogic circuit is used to provide the signal and the reference frequencysignal from a clock signal.
 15. A continuous-time filter systemcomprising: a master control unit a slave unit with a least one slavefilter, the master control unit including an integrator having atransconductor and a capacitor that match those elements of the slavefilter that define a time constant of the slave filter, a voltagecomparator connected to a variable threshold voltage and to an output ofthe integrator, the voltage comparator providing an output frequencysignal, and a phase frequency comparator providing a control signal asan output signal, the phase frequency comparator receiving said outputfrequency signal and a reference frequency signal as input signals; andthe slave unit including said at least one slave filter that uses thecontrol signal to influence the slave filter's time constant and thereinfacilitate calibration of a transfer function of the slave filter,wherein the integrator has a transconductance that can be tuned byvarying an input clock frequency of a clock signal while keeping athreshold voltage being applied to an input of the voltage comparatorand a DC voltage being applied to an input of the integrator unchanged.